The present application relates to a semiconductor structure and a method of forming the same. More particularly, the present application relates to a vertical transistor including a gate structure containing a work function metal liner that is wing-free, and a method of forming the same.
Conventional vertical transistors are devices where the source-drain current flows in a direction normal to the substrate surface. In such devices, a vertical semiconductor pillar (or fin) defines the channel with the source and drain located at opposing ends of the semiconductor pillar. Vertical transistors are an attractive option for technology scaling for beyond 7 nm technologies.
In a conventional vertical transistor processing flow, a gate dielectric material layer and a work function metal layer are recessed to a certain level of the semiconductor fin to define the channel length. However, due to the confined geometry of the gate structure, the outer work function metal layer is under etched (i.e., the work function metal layer has less exposure to the wet chemical at the edge). This under etch results in a non-uniform work function metal liner having a winged surface. The work function metal liner having the winged surface causes degradation of device yield as well as a parasitic capacitance between the gate structure and the top source/drain structure. There is thus a need for providing a vertical transistor that includes a gate structure containing a work function metal liner that is wing-free.